Our work "RL-MUL 2.0: Multiplier Design Optimization with Parallel Deep Reinforcement Learning and Space Reduction" has been accepted by TODAES!
Dec 13, 2024
Our work "A Holistic FPGA Architecture Exploration Framework for Deep Learning Acceleration" has been accepted by ASP-DAC 2025!
Sep 8, 2024
Our work "UFO-MAC: A Unified Framework for Optimization of High-Performance Multipliers and Multiply-Accumulators" has been accepted by ICCAD 2024!
Jun 26, 2024