Paper-Conference

A Unified Framework for Circuit-Aware Tapped-Inductor Inverse Design with Topology-Aware Sequence Representation

TAP-MAC: Low-Power Optimization of Multipliers and Multiply-Accumulators via Topology-Aware Power Modeling

PCB-Bench: Benchmarking LLMs for Printed Circuit Board Placement and Routing

Efficient Continuous Logic Optimization with Diffusion Model

A Holistic FPGA Architecture Exploration Framework for Deep Learning Acceleration

UFO-MAC: A Unified Framework for Optimization of High-Performance Multipliers and Multiply-Accumulators