NEWS & MILESTONES
Updates.
“Forever — is composed of Nows”
One paper accepted by ASP-DAC 2027!
Our work “A Unified Framework for Circuit-Aware Tapped-Inductor Inverse Design with Topology-Aware Sequence Representation” has been accepted by ASP-DAC 2027!
One paper accepted by TODAES!
Our work “PrefixAgent: An LLM-Powered Design Framework for Efficient Prefix Adder Optimization” has been accepted by TODAES!
One paper accepted by ICCAD 2026!
Our work “TAP-MAC: Low-Power Optimization of Multipliers and Multiply-Accumulators via Topology-Aware Power Modeling” has been accepted by ICCAD 2026!
One paper accepted by ICLR 2026!
Our work “PCB-Bench: Benchmarking LLMs for Printed Circuit Board Placement and Routing” has been accepted by ICLR 2026!
One paper accepted by DAC 2025!
Our work “Efficient Continuous Logic Optimization with Diffusion Model” has been accepted by DAC 2025!
One paper accepted by TODAES!
Our work “RL-MUL 2.0: Multiplier Design Optimization with Parallel Deep Reinforcement Learning and Space Reduction” has been accepted by TODAES!
One paper accepted by ASP-DAC 2025!
Our work “A Holistic FPGA Architecture Exploration Framework for Deep Learning Acceleration” has been accepted by ASP-DAC 2025!
I have successfully passed the M.Phil. thesis examination!
Congratulations to myself!
One paper accepted by ICCAD 2024!
Our work “UFO-MAC: A Unified Framework for Optimization of High-Performance Multipliers and Multiply-Accumulators” has been accepted by ICCAD 2024!