Our work "PCB-Bench: Benchmarking LLMs for Printed Circuit Board Placement and Routing" has been accepted by ICLR 2026!
Our work "Efficient Continuous Logic Optimization with Diffusion Model" has been accepted by DAC 2025!
Our work "RL-MUL 2.0: Multiplier Design Optimization with Parallel Deep Reinforcement Learning and Space Reduction" has been accepted by TODAES!
Our work "A Holistic FPGA Architecture Exploration Framework for Deep Learning Acceleration" has been accepted by ASP-DAC 2025!
Congratulations to myself!
Our work "UFO-MAC: A Unified Framework for Optimization of High-Performance Multipliers and Multiply-Accumulators" has been accepted by ICCAD 2024!
